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Geon Secure Execution Processor


Geon Secure Execution Processor delivers secure code execution by supporting two secure contexts. All code and data belonging to a secure context is cryptographically isolated in main memory, so even complete software breach outside of secure context doen not compromise its security (confidentiality or integrity).
 
Cryptographic operations can be performed with single Keccak (SHA3) core or by combination of cryptographic hash primitives (SHA3 or SHA2) and symmetric ciphers.
 
Despite upgrades allowing for secure execution processing, the Geon processor maintains high configurability, performance and efficiency of the proven BA22. Performance is remaining in-line with BA22-CE.
 
The processor is already verified at system level and suitable for diverse security needs.
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Security Features
  • Two cryptographically isolated secure execution contexts
  • Cryptographic primitives agnostic
  • Lowest overhead implementation with single Keccak (SHA3) core
  • Alternativelly any cryptographic hash function and symmetric cipher can be used
  • Supports and validated with Rubicon Zero-Knowledge Identity Plaform
 
 
 
High Performance 32-bit CPU
  • 1.79 DMIPS/MHz
  • Variable length (16/24/32/48 bits) instruction encoding
  • Single-cycle execution on most instructions
  • Fast and precise internal interrupt response
  • Custom user instructions
 
   
 
Small Silicon Footprint & Low Power
  • Industry-leading code density
    • Compact code minimizes instruction area & power
    • 32-bit architecture reduces power-draining memory accesses
  • 19k gates and as little as 0.05W/MHz on 90nm
 
 
 
Fast & Flexible Memory Access
  • Harvard-style Caches and MMU separate for Instructions and Data
  • Tightly coupled Quick Memory (QMEM) for fast and deterministic access to code and/or data
 
 
Efficient Power Management
  • Further reduces power consumption by 2x to 100x using dynamic clock gating for individual units
  • Software controlled clock frequency in slow and idle modes
  • Interrupt wake-up in doze and sleep modes
 
 
Advanced Debug Capability
  • Conventional target-debug agent with a debug exception handler
  • Non-intrusive debug/trace for both the CPU and the system
  • Complex chained watchpoint and breakpoint conditions
 
 
Optional Processor Units
  • Programmable Vectored Interrupt Controller
  • Timer Unit
  • Debug Unit
    • MDB support
    • Trace port support
  • ROM patching Unit
  • Floating Point Unit
  • Hardware Multiplier/Divider
 
 
Integrated Peripherals
  • 32 bits-wide tick timer and Programmable interrupt controller with 32 maskable interrpt sources
 
 
Optional Peripherals
  • AMBA bus infrastructure cores
  • Microcontroller peripherals such as GPIO, UART, Real-Time Clock, and Timers
  • Serial communication cores such as I2C and SPI
  • Memory controllers, interconnect IP and more
 
  
Easy Software Development
  • Eclipse IDE for Windows, Linux
  • ANSI C/C++ compiler, debugger, linker, assembler, & utilities
  • Architectural simulator
  • Ported libraries & RTOS

Beyond BA2x Instruction SetInstruction Set Architecture (ISA) together with processor architecture defines a software view of processor family as seen by programmer. It has prevailing impact on several key processor characteristics, including code density and ease of software development.
 
The BA2x ISA was designed from ground up with design goal achieving highest code density among 32-bit processors with no compromise on performance. To achieve such ambitious goal it was necessary to rethink how ISA is designed. Often instruction set is defined with legacy constraints and by processor architects who are coming from hardware background. We have instead dropped all legacy constraints and first developed a fully working and optimized compiler for initial ISA proposal. This allowed us to do conclusive benchmarking on vast code base, comparing results with other architectures and finding new, better solutions.
 
Ultimately, ISA design is an optimization problem. Iterating through numerous approaches, ideas, optimizations and also dead ends we finally settled on BA2x ISA that is (based on our benchmarks) best fulfilling our design goal of highest code density at no compromise on performance.
 
The resulting BA2x ISA has 32 general purpose registers, all addressable with all register operand instructions. It also features cleverly encoded 16-bit, 24-bit, 32-bit and 48-bit instructions for maximum code density with simple decoding.
 
The smaller the processor, the more ISA matters. Best example of BA2x ISA is Beyond BA20 PipelineZero processor, capable of outstanding performance per MHz at extremely small area and ultra-low power consumption.
 
 
 
 
 
Code density
Reducing ASIC power and cost
 
  • Highest code density among 32-bit and 64-bit processors without compromise on performance
  • Often better code density than with legacy 8-bit and 16-bit processors, like 8051 and 80251.
  • Smaller memories burn less power, especially important when on-die memories often consume more power than processor itself.
  • In case of embedded processors, memories are usually bigger than processor core itself.
  • Code density is achieved by reducing instruction count instead of reducing the average instruction size.
 
 
Ease-of-use
  • Programming in assembly is usually not required. When it is, instructions take 32-bit immediates, and assembler automatically selects shortest one unless specifically instructed otherwise.
  • Instructions have no strange side effects. All instructions with register operands can address any of 32 general purpose registers.
 
 
 
Performance
32 GPRs, small static instruction count
  • Code compiled into BA2x ISA usually results in 10% - 40% smaller static instruction count than competing architectures.
  • 32 general purpose registers reduce chance of register spills (saving and restoring temporary data to stack, due to lack of available registers), more chances to unroll loops…
 
 
Extensibility
  • More then 40% of instruction space is available for instruction set extensions (~25 % will be always left for custom instructions)
 
 
 
 
 

To facilitate the software development and testing as well as ensure code compactness and stability, Beyond provides customers with a comprehensive range of development tools:
 
BeyondStudio Integrated Development Environment
BeyondStudio integrates the development tools for any BA2x processor into a single platform based on the Eclipse open development environment. It offers easy access to the compilation and debugging tools which are essential in modern software development.
 
Major components of BeyondStudio
Eclipse based IDE with all of its generic functionalities
  • Managed build system
  • Great source code editor with syntax highlighting, customizable code style, code cross-referencing, etc.
  • Graphical source level debugger
  • GUI based configuration
  • Plug-in extensibility, with numerous plug-ins already available
  • Simple deployment of binary to simulator or hardware
 
Integrated GNU based cross compiling toolchain
  • Generating industry-leading code density
  • GNU Compiler Collection (GCC), including front ends for C, C++, Objective-C, Fortran, Java, Ada, and Go, along with libraries for these languages (libstdc++, libgcj,...)
  • GNU Binutils a collection of binary tools
  • GNU Project Debugger (GDB)
  • Available also as a self-standing option
 
Supported library
  •   Newlib C library
 
   
Instruction set simulator (basim)
  • Cycle accurate for QMEM option
  • Support of instruction level profiling
 
   
Custom tools and plug-in components allowing for easy deployement of binary to simulator or hardware targets.    
       
 
 
 
Beyond Debug Key
Beyond Debug Key is an essential tool for embedded software development, enabling access to processor debug features through JTAG interface and simultaneous connection to UART serial console.
Featuring USB 2.0 connection to PC and wide target IO voltage range it is a compact debug and diagnostics tool. Beyond Debug Hub is fully compatible with Beyond BA2xTM processor family as well as majority of other processors.
In addition to IEEE 1149.1 and IEEE 1149.7 standard JTAG signal set it also supports proprietary One Wire Debug and Two Wire Debug protocols. With appropriate software it can be used to perform various IC level and board level diagnostics.
 Beyond Debug Hub

 
 
 
 
Linux and Android Development Tools
GNU based cross compiling toolchain
  • Generating industry-leading code density
  • GNU Compiler Collection (GCC), including front ends for C, C++, Objective-C, Fortran, Java, Ada and Go, along with libraries for these languages (libstd++, libgcj, ...)
  • GNU Binutils collection of binary tools
  • kgdb support in BA Linux kernel
 
Supported libraries
  • glibc C Library
    • nptl thraeding library
    • GDB Server for glibc
  • uClibc C Library
    • support for fully featured processors
    • support for mmu-less procesors
  • bionic C Library
    • native Android development
   
 
 
 
 


Geon Secure Execution Processor


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